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september 2011 doc id 14926 rev 5 1/32 1 tda7492 50 w + 50 w dual btl class-d audio amplifier features 50 w + 50 w continuous output power at thd = 10% with r l = 6 and v cc = 25 v 40 w + 40 w continuous output power at thd = 10% with r l = 8 and v cc = 25 v wide-range single-supply operation (8 - 26 v) high efficiency ( = 90%) four selectable, fixed gain settings of nominally 21.6 db, 27.6 db, 31.1 db and 33.6 db differential inputs minimize common-mode noise standby and mute features short-circuit protection thermal overload protection externally synchronizable ecopack ? , environmentally-friendly package description the tda7492 is a dual btl class-d audio amplifier with single power supply designed for lcd tvs and monitors. thanks to the high efficiency and exposed-pad-up (epu) package only a simple heatsink is required. powersso-36 with exposed pad up table 1. device summary order code operating temp. range package packaging tda7492 0 to 70 c powersso-36 epu tube TDA749213TR 0 to 70 c powersso-36 epu tape and reel www.st.com
contents tda7492 2/32 doc id 14926 rev 5 contents 1 device block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 pin list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.3 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4 characterization curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.1 characterizations for 6- loads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.2 characterizations for 8- loads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4.3 characterizations for 4- loads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.4 test board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 5 applications circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 6 applications information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 6.1 mode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 6.2 gain setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 6.3 input resistance and capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 6.4 internal and external clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 6.4.1 master mode (internal clock) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 6.4.2 slave mode (external clock) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 6.5 output low-pass filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 6.6 protection functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 6.7 diagnostic output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 6.8 heatsink requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 7 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
tda7492 contents doc id 14926 rev 5 3/32 8 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
list of tables tda7492 4/32 doc id 14926 rev 5 list of tables table 1. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. pin description list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 3. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 4. thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 5. electrical specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 6. mode settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 table 7. gain settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 table 8. how to set up synclk . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 table 9. powersso-36 epu dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 table 10. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
tda7492 list of figures doc id 14926 rev 5 5/32 list of figures figure 1. internal block diagram (showing one channel only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 2. pin connections (top view, pcb view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 3. output power vs. supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 4. thd vs. output power (1 khz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 5. thd vs. output power (100 hz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 6. thd vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 7. frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 8. crosstalk . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 9. fft performance (0 db) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 10. fft performance (-60 db) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 11. output power vs. supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 12. thd vs. output power (1 khz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 13. thd vs. output (100 hz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 14. thd vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 15. frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 16. crosstalk . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 17. fft performance (0 db) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 18. fft performance (-60 db) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 19. output power vs. supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 20. thd vs. output power (1 khz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 21. thd vs. output (100 hz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 22. thd vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 23. frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 24. crosstalk . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 25. fft performance (0 db) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 26. fft performance (-60 db) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 27. test board layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 28. applications circuit for class-d amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 29. standby and mute circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 30. turn on/off sequence for minimizing speaker ?pop? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 31. device input circuit and frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 32. master and slave connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 figure 33. typical lc filter for a 8- speaker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 figure 34. typical lc filter for a 4- speaker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 figure 35. behavior of pin diag for various protection conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 figure 36. powersso-36 epu outline drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
device block diagram tda7492 6/32 doc id 14926 rev 5 1 device block diagram figure 1 shows the block diagram of one of the two identical channels of the tda7492. figure 1. internal block diagram (showing one channel only)
tda7492 pin description doc id 14926 rev 5 7/32 2 pin description 2.1 pinout figure 2. pin connections (top view, pcb view) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 28 29 30 31 32 33 34 35 36 19 20 21 22 23 24 25 26 27 vss sub gnd outpb outpb pgndb pgndb pvccb pvccb outnb outnb outna outna pvcca pvcca pgnda pgnda outpa outpa pgnd vddpw stby mute inpa inna rosc synclk vdds sgnd diag svr gain0 gain1 inpb innb vref svcc ep exposed pad up connect to ground
pin description tda7492 8/32 doc id 14926 rev 5 2.2 pin list table 2. pin description list number name type description 1 sub_gnd pwr connect to the frame 2,3 outpb o positive pwm for right channel 4,5 pgndb pwr power stage ground for right channel 6,7 pvccb pwr power supply for right channel 8,9 outnb o negative pwm output for right channel 10,11 outna o negative pwm output for left channel 12,13 pvcca pwr power supply for left channel 14,15 pgnda pwr power stage ground for left channel 16,17 outpa o positive pwm output for left channel 18 pgnd pwr power stage ground 19 vddpw o 3.3-v (nominal) regulator output referred to ground for power stage 20 stby i standby mode control 21 mute i mute mode control 22 inpa i positive differential input of left channel 23 inna i negative differentia l input of left channel 24 rosc o master oscillator frequency-setting pin 25 synclk i/o clock in/out for external oscillator 26 vdds o 3.3-v (nominal) regulator output referred to ground for signal blocks 27 sgnd pwr signal ground 28 diag o open-drain diagnostic output 29 svr o supply voltage rejection 30 gain0 i gain setting input 1 31 gain1 i gain setting input 2 32 inpb i positive differential input of right channel 33 innb i negative differentia l input of right channel 34 vref o half vdds (nominal) referred to ground 35 svcc pwr signal power supply 36 vss o 3.3-v (nominal) regulator output referred to power supply - ep - exposed pad for heatsink, to be connected to gnd
tda7492 electrical specifications doc id 14926 rev 5 9/32 3 electrical specifications 3.1 absolute maximum ratings 3.2 thermal data 3.3 electrical specifications unless otherwise stat ed, the results in ta bl e 5 below are given for the conditions: v cc =25v, r l (load) = 8 , r osc = r3 = 39 k , c8 = 100 nf, f = 1 khz, g v = 21.6 db and tamb = 25 c. table 3. absolute maximum ratings symbol parameter value unit v cc dc supply voltage for pins pvcca, pvccb, svcc 30 v v i voltage limits for input pins stby, mute, inna, inpa, innb, inpb, gain0, gain1 -0.3 - 3.6 v t op operating temperature 0 to 70 c t j junction temperature -40 to 150 c t stg storage temperature -40 to 150 c table 4. thermal data symbol parameter min typ max unit r th j-case thermal resistance, junction to case - 2 3 c/w table 5. electrical specifications symbol parameter condition min typ max unit v cc supply voltage for pins pvcca, pvccb, svcc -8-26v i q total quiescent current without lc - 26 35 ma i qstby quiescent current in standby - - 2.5 5.0 a v os output offset voltage play mode --100 mv mute mode - - 60 i ocp overcurrent protection threshold r l = 0 4.8 6.0 - a t j junction temperature at thermal shutdown - - 150 - c r i input resistance differential input 48 60 - k v ovp overvoltage protection threshold - 28 29 - v
electrical specifications tda7492 10/32 doc id 14926 rev 5 v uvp undervoltage protection threshold - --7v r dson power transistor on resistance high side - 0.2 - low side - 0.2 - p o output power thd = 10% - 40 - w thd = 1% - 32 - p o output power r l = 6 , thd = 10%, v cc = 25v -50- w r l = 6 , thd = 1% v cc = 25v -40- p d dissipated power p o =40w +40 w, thd = 10% -8.0-w efficiency p o = 40 w + 40w 80 90 - % thd total harmonic distortion p o = 1 w - 0.1 0.4 % g v closed-loop gain gain0 = l, gain1 = l 20.6 21.6 22.6 db gain0 = l, gain1 = h 26.6 27.6 28.6 gain0 = h, gain1 = l 30.1 31.1 32.1 gain0 = h, gain1 = h 32.6 33.6 34.6 g v gain matching - - - 1 db ct cross talk f = 1 khz - 50 - db en total input noise a curve, g v = 20 db - 20 - v f = 22 hz to 22 khz - 25 35 svrr supply voltage rejection ratio fr = 100 hz, vr = 0.5 v, c svr = 10 f 40 50 - db t r , t f rise and fall times - - 50 - ns f sw switching frequency internal oscillator 290 310 330 khz f swr output switching frequency range with internal oscillator (1) 250 - 400 khz with external oscillator (2) 250 - 400 v inh digital input high (h) - 2.3 - - v v inl digital input low (l) - - 0.8 a mute mute attenuation v mute = 1 v 60 80 - db 1. f sw = 10 6 / ((16 * r osc + 182) * 4) khz, f synclk = 2 * f sw with r3 = 39 k (see figure 28. ). 2. f sw = f synclk / 2 with the frequency of the external oscillator. table 5. electrical specifications (continued) symbol parameter condition min typ max unit
tda7492 characterization curves doc id 14926 rev 5 11/32 4 characterization curves the general test conditions used for produc ing the characterization curves can be summarized as follows: test board: sz lab tda7492 slug-up demo board test frequency: 1 khz (also 100 hz for thd vs. output power only) output power: 1 w for 6- loads ? test voltage: 25 v ? lc filter: l = 22 h and c = 220 nf for 8- loads ? test voltage: 25 v ? lc filter: l = 33 h and c = 220 nf for 4- loads ? test voltage: 20 v ? lc filter: l = 15 h and c = 470 nf. figure 28 on page 22 shows the circuit with which the characterization curves, shown in the next sections, were measured. figure 27 on page 21 shows the pcb layout. 4.1 characterizations for 6- loads figure 3. output power vs. supply voltage te s t condition s : vcc = 15 - 25 v, rl = 6 , ro s c = 39 k , co s c = 100 nf, f = 1 khz, gv = 3 0 db, t a m b = 25 c s pecific a tion limit: typic a l: v s = 25 v, rl = 6 , po = 50 w a tthd = 10 % , po = 40 w a tthd = 1 %

10 % thd 1 % thd
characterization curves tda7492 12/32 doc id 14926 rev 5 figure 4. thd vs. output power (1 khz) figure 5. thd vs. output power (100 hz) te s t condition s : vcc = 25 v, rl = 6 , ro s c = 39 k , co s c = 100 nf, f = 1 khz, gv = 3 0 db, t a m b = 25 c s pecific a tion limit: typic a l: po = 50 w a t thd = 10 % 0.01 10 0.02 0.05 0.1 0.2 0.5 1 2 5 thd % 100m 60 200m 500m 1 2 5 10 20 o u tp u t power (w) te s t condition s : vcc = 25 v, rl = 6 , ro s c = 39 k , co s c = 100 nf, f = 100 hz, gv = 3 0 db, t a m b = 25 c s pecific a tion limit: typic a l: po = 50 w a t thd = 10 % 0.01 10 0.02 0.05 0.1 0.2 0.5 1 2 5 thd % 100m 60 200m 500m 1 2 5 10 20 o u tp u t power (w)
tda7492 characterization curves doc id 14926 rev 5 13/32 figure 6. thd vs. frequency figure 7. frequency response figure 8. crosstalk 0.01 0.5 0.02 0.0 3 0.04 0.05 0.06 0.07 0.1 0.2 0. 3 0.4 thd % 20 20k 50 100 200 500 1k 2k 5k 10k fre qu ency (hz) te s t condition s : vcc = 25 v, rl = 6 , ro s c= 39 k , co s c = 100 nf, f = 1 khz, gv = 3 0 db, po = 1 w, t a m b = 25 c s pecific a tion limit: typic a l: thd < 0.4 % s pecific a tion limit: m a x: +/- 3 db (20 hz to 20 khz) te s t condition s : vcc = 25 v, rl = 6 , ro s c = 39 k , co s c = 100 nf, f = 1 khz, gv = 3 0 db, po = 1 w, t a m b = 25 c -6 +1 -5.5 -5 -4.5 -4 - 3 .5 - 3 -2.5 -2 -1.5 -1 -0.5 -0 +0.5 dbra 20 20k 50 100 200 500 1k 2k 5k 10k fre qu ency (hz) s pecific a tion limit: typic a l: > 50 db ( a t f = 1 khz) te s t condition s : vcc = 25 v, rl = 6 , ro s c = 39 k , co s c = 100 nf, f = 1 khz, gv = 3 0 db, po = 1 w t a m b = 25 c -120 -60 -115 -110 -105 -100 -95 -90 -85 -80 -75 -70 -65 cro ss t a lk db 20 20k 50 100 200 500 1k 2k 5k 10k t t t t t t fre qu ency (hz)
characterization curves tda7492 14/32 doc id 14926 rev 5 figure 9. fft performance (0 db) figure 10. fft performance (-60 db) s pecific a tion limit: typic a l: > 60 db for the h a rmonic fre qu ency te s t condition s : vcc = 25 v, rl = 6 , ro s c = 39 k , co s c = 100 nf, f = 1 khz, gv = 3 0 db, po = 1 w, t a m b = 25 c -150 +10 -140 -1 3 0 -120 -110 -100 - 9 0 - 8 0 -70 -60 -50 -40 - 3 0 -20 -10 +0 dbra 20 20k 50 100 200 500 1k 2k 5k 10k fre qu ency (hz) -150 +10 -140 -1 3 0 -120 -110 -100 - 9 0 - 8 0 -70 -60 -50 -40 - 3 0 -20 -10 +0 dbra 20 20k 50 100 200 500 1k 2k 5k 10k s pecific a tion limit: typic a l: > 9 0 db for the h a rmonic fre qu ency te s t condition s : vcc = 25 v, rl = 6 , ro s c = 39 k , co s c = 100 nf, f = 1 khz, gv = 3 0 db, po = -60 db ( a t 1 w = 0 db) t a m b = 25 c fre qu ency (hz)
tda7492 characterization curves doc id 14926 rev 5 15/32 4.2 characterizations for 8- loads figure 11. output power vs. supply voltage figure 12. thd vs. output power (1 khz) te s t condition s : vcc = 5 - 25 v, rl = 8 , ro s c = 39 k , co s c = 100 nf, f = 1 khz, gv = 3 0 db, t a m b = 25 c s pecific a tion limit: typic a l: v s = 25 v, rl = 8 , po = 40 w a t thd = 10 % , po = 3 2 w a t thd = 1 %

10 % thd 1 % thd 0.01 10 0.02 0.05 0.1 0.2 0.5 1 2 5 thd % 100m 50 200m 500m 1 2 5 10 20 te s t condition s : vcc = 25 v, rl = 8 , ro s c = 39 k , co s c = 100 nf, f = 1 khz, gv = 3 0 db, t a m b = 25 c s pecific a tion limit: typic a l: po = 40 w a t thd = 10 % o u tp u t power (w)
characterization curves tda7492 16/32 doc id 14926 rev 5 figure 13. thd vs. output (100 hz) figure 14. thd vs. frequency figure 15. frequency response te s t condition s : vcc = 25 v, rl = 8 , ro s c = 39 k , co s c = 100 nf, f = 100 hz, gv = 3 0 db, t a m b = 25 c s pecific a tion limit: typic a l: po = 40 w a t thd = 10 % 0.01 10 0.02 0.05 0.1 0.2 0.5 1 2 5 thd % 100m 50 200m 500m 1 2 5 10 20 o u tp u t power (w) te s t condition s : vcc = 25 v, rl = 8 , ro s c = 39 k , co s c = 100 nf, f = 1 khz, gv = 3 0 db, po = 1 w, t a m b = 25 c s pecific a tion limit: typic a l: thd < 0.4 % 0.01 0.5 0.02 0.0 3 0.04 0.05 0.06 0.07 0.1 0.2 0. 3 0.4 thd % 20 20k 50 100 200 500 1k 2k 5k 10k fre qu ency (hz) s pecific a tion limit: m a x: +/- 3 db (20 hz to 20 khz) te s t condition s : vcc = 25 v, rl = 8 , ro s c = 39 k , co s c = 100 nf, f = 1 khz, gv = 3 0 db, po = 1 w, t a m b = 25 c -6 +1 -5.5 -5 -4.5 -4 - 3 .5 - 3 -2.5 -2 -1.5 -1 -0.5 -0 +0.5 dbra 20 20k 50 100 200 500 1k 2k 5k 10k fre qu ency (hz)
tda7492 characterization curves doc id 14926 rev 5 17/32 figure 16. crosstalk figure 17. fft performance (0 db) figure 18. fft performance (-60 db) s pecific a tion limit: typic a l: > 50 db ( a t f = 1 khz) te s t condition s : vcc = 25 v, rl = 8 , ro s c = 39 k , co s c = 100 nf, f = 1 khz, gv = 3 0 db, po = 1 w, t a m b = 25 c -120 -60 -115 -110 -105 -100 - 9 5 - 9 0 - 8 5 - 8 0 -75 -70 -65 cro ss t a lk db 20 20k 50 100 200 500 1k 2k 5k 10k t t t t t t t t fre qu ency (hz) s pecific a tion limit: typic a l: > 60 db for the h a rmonic fre qu ency te s t condition s : vcc = 25 v, rl = 8 , ro s c = 39 k , co s c = 100 nf, f = 1 khz, gv = 3 0 db, po = 1 w, t a m b = 25 c -150 +10 -140 -1 3 0 -120 -110 -100 - 9 0 - 8 0 -70 -60 -50 -40 - 3 0 -20 -10 +0 dbra 20 20k 50 100 200 500 1k 2k 5k 10k fre qu ency (hz) s pecific a tion limit: typic a l: > 9 0 db for the h a rmonic fre qu ency te s t condition s : vcc = 25 v, rl = 8 , ro s c = 39 k , co s c = 100 nf, f = 1 khz, gv = 3 0 db, po = -60 db ( a t 1 w = 0 db) t a m b = 25 c -150 +10 -140 -1 3 0 -120 -110 -100 - 9 0 - 8 0 -70 -60 -50 -40 - 3 0 -20 -10 +0 dbra 20 20k 50 100 200 500 1k 2k 5k 10k fre qu ency (hz)
characterization curves tda7492 18/32 doc id 14926 rev 5 4.3 characterizations for 4- loads figure 19. output power vs. supply voltage figure 20. thd vs. output power (1 khz) te s t condition s : vcc = 15 - 22 v, rl = 4 , ro s c = 39 k , co s c = 100 nf, f = 1 khz, gv = 20 db, t a m b = 25 c s pecific a tion limit: typic a l: v s = 20 v, rl = 4 , po = 47 w a t thd = 10 % , po = 38 w a t thd = 1 %

10 % thd 1 % thd 0.01 10 0.02 0.05 0.1 0.2 0.5 1 2 5 thd + n % 100m 50 200m 500m 1 2 5 10 20 te s t condition s : vcc = 20 v, rl = 4 , ro s c = 39 k , co s c = 100 nf, f = 1 khz, gv = 20 db, t a m b = 25 c s pecific a tion limit: typic a l: po = 38 w a t thd = 1 % o u tp u t power (w)
tda7492 characterization curves doc id 14926 rev 5 19/32 figure 21. thd vs. output (100 hz) figure 22. thd vs. frequency figure 23. frequency response 0.01 10 0.02 0.05 0.1 0.2 0.5 1 2 5 thd + n % 100m 50 200m 500m 1 2 5 10 20 te s t condition s : vcc = 20 v, rl = 4 , ro s c = 39 k , co s c = 100 nf, f = 100 hz, gv = 20 db, t a m b = 25 c s pecific a tion limit: typic a l: po = 38 w a t thd = 1 % o u tp u t power (w) te s t condition s : vcc = 20 v, rl = 4 , ro s c = 39 k , co s c = 100 nf, f = 1 khz, gv = 20 db, 0 db a t f = 1 khz, po = 1 w, t a m b = 25 c s pecific a tion limit: typic a l: thd < 0.4 % 0.01 0.5 0.02 0.0 3 0.04 0.05 0.06 0.07 0.1 0.2 0. 3 0.4 thd + n % 20 20k 50 100 200 500 1k 2k 5k 10k fre qu ency (hz) - 3 +1 -2.75 -2.5 -2.25 -2 -1.75 -1.5 -1.25 -1 -0.75 -0.5 -0.25 -0 +0.25 +0.5 +0.75 dbra 20 20k 50 100 200 500 1k 2k 5k 10k te s t condition s : vcc = 20 v, rl = 4 , ro s c = 39 k , co s c = 100 nf, f = 1 khz, gv = 20 db, 0 db a t f = 1 khz, po = 1 w, t a m b = 25 c s pecific a tion limit: typic a l: m a x: +/- 3 db (20 hz to 20 khz) fre qu ency (hz)
characterization curves tda7492 20/32 doc id 14926 rev 5 figure 24. crosstalk figure 25. fft performance (0 db) figure 26. fft performance (-60 db) te s t condition s : vcc = 20 v, rl = 4 , ro s c = 39 k , co s c = 100 nf, f = 1 khz, gv = 20 db, 0 db a t f = 1 khz, po = 1 w, t a m b = 25 c s pecific a tion limit: typic a l: > 50 db ( a t f = 1 khz) -120 -60 -115 -110 -105 -100 - 9 5 - 9 0 - 8 5 - 8 0 -75 -70 -65 cro ss t a lk db 20 20k 50 100 200 500 1k 2k 5k 10k fre qu ency (hz) t t t t t te s t condition s : vcc = 20 v, rl = 4 , ro s c = 39 k , co s c = 100 nf, f = 1 khz, gv = 20 db, 0 db a t f = 1 khz, po = 1 w, t a m b = 25 c s pecific a tion limit: typic a l: > 60 db for the h a rmonic fre qu ency -150 +10 -140 -1 3 0 -120 -110 -100 - 9 0 - 8 0 -70 -60 -50 -40 - 3 0 -20 -10 +0 dbra 20 20k 50 100 200 500 1k 2k 5k 10k fre qu ency (hz) te s t condition s : vcc = 20 v, rl = 4 , ro s c = 39 k , co s c = 100 nf, f = 1 khz, gv = 20 db, 0 db a t f = 1 khz, po = 1 w, t a m b = 25 c s pecific a tion limit: typic a l: > 9 0 db for the h a rmonic fre qu ency -150 +10 -140 -1 3 0 -120 -110 -100 - 9 0 - 8 0 -70 -60 -50 -40 - 3 0 -20 -10 +0 dbra 20 20k 50 100 200 500 1k 2k 5k 10k fre qu ency (hz)
tda7492 characterization curves doc id 14926 rev 5 21/32 4.4 test board figure 27. test board layout 2 . test board
applications circuit tda7492 22/32 doc id 14926 rev 5 5 applications circuit figure 28. applications circuit for class-d amplifier ,1/ ,1/ ,15 ,15 9&& *1' 287/ 287/ 2875 2875 7'$36oxjgrzq /&),/7(5&20321(17 /rdg //// && rkp rkp rkp x+ x+ x+ q) q) q) 087( 67%< 932:(56833/< rkp x+ q) )ru 6lqjoh(qghg ,qsxw )ru 6lqjoh(qghg ,qsxw &/$66'$03/,),(5 7'$3 & & & & x) 9 & q) 5 . / x+ & q) & q) & q) & q) & q) & q) & q) & s) 5 5 / x+ & q) & q) / x+ & s) 5 5 / x+ & q) & q) & q) & q) & q) & q) ,13% 966 2871% 3*1'% 39&&% 2873% 2871$ 39&&$ 3*1'$ 2873$ ,11% 2871% 3*1'% 087( 39&&% 2873% 695 2871$ 68%b*1' ,13$ ,11$ 6*1' 9''6 ',$* 9''3: 3*1' 67%< 526& *$,1 69&& *$,1 6<1&/. 2873$ 3*1'$ 95() 39&&$ ,& 5 n 5 5 & q) 5 n 5 n 5 n & q) & q) & q) - - 6 6 & q) & x) *1' 287 ,1 ,& /&= /&= /&= /&= & x) 9 - - - - - - & x) 9 & x) 9 & x) 9 5 n ',$* 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 9''6 9''6 9&& 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 9 9 6*1' 6*1' 6*1' 6*1' 6*1' 6<1&/. class-d amplifier lc filter components load l1,l2,l3,l4 c20,c26 4 15 h 470 nf 6 22 h 220 nf 8 33 h 220 nf 16 68 h 220 nf input settings for gain: gain0 : gain1 nominal gain 0 v : 0 v 21.6 db 0 v : 3.3 v 27.6 db 3.3 v : 0 v 31.1 db 3.3 v : 3.3 v 33.6 db input settings for standby, mute and play: stby : mute mode 0 v : 0 v standby 0 v : 3.3 v standby 3.3 v : 0 v mute 3.3 v : 3.3 v play tda7492p
tda7492 applications information doc id 14926 rev 5 23/32 6 applications information 6.1 mode selection the three operating modes of the tda7492 are set by the two inputs, stby (pin 20) and mute (pin 21). standby mode: all circuits are turned off, very low current consumption. mute mode: inputs are connected to ground and the positive and negative pwm outputs are at 50% duty cycle. play mode: the amplifiers are active. the protection functions of t he tda7492 are enabled by pullin g down the voltages of the stby and mute inputs shown in figure 29 . the input current of the corresponding pins must be limited to 200 a. figure 29. standby and mute circuits figure 30. turn on/off sequence for minimizing speaker ?pop? table 6. mode settings mode stby mute standby l (1) 1. drive levels defined in table 5: electrical s pecifications on page 9 x (don?t care) mute h (1) l play h h tda7492 stby mute 0 v 3.3 v c7 2.2 f r2 30 k standby 0 v 3.3 v c15 2.2 f r4 30 k mute
applications information tda7492 24/32 doc id 14926 rev 5 6.2 gain setting the gain of the tda7492 is set by the two inputs, gain0 (pin 30) and gain1 (pin31). internally, the gain is set by changing the feedback resistors of the amplifier. 6.3 input resistance and capacitance the input impedance is set by an internal resistor ri = 60 k (typical). an input capacitor (ci) is required to couple the ac input signal. the equivalent circuit and frequency response of the input components are shown in figure 31 . for ci = 470 nf the high-pass filter cutoff frequency is below 20 hz: fc = 1 / (2 * * ri * ci) figure 31. device input circuit and frequency response table 7. gain settings gain0 gain1 nominal gain, g v (db) 0021.6 0127.6 1031.1 1133.6 ri input ci rf input pin signal
tda7492 applications information doc id 14926 rev 5 25/32 6.4 internal and external clocks the clock of the class-d amplifier can be generated internally or can be driven by an external source. if two or more class-d amplifiers are used in the same system, it is recommended that all devices operate at the same clock frequency. this can be implemented by using one tda7492 as master clock, while the other devices are in slave mode, that is, externally clocked. the clock interconnect is via pin synclk of each device. as explained below, synclk is an output in master mode and an input in slave mode. 6.4.1 master mode (internal clock) using the internal oscillator, th e output switching frequency, f sw , is controlled by the resistor, r osc , connected to pin rosc: f sw = 10 6 / ((r osc * 16 + 182) * 4) khz where r osc is in k . in master mode, pin synclk is used as a clock output pin whose frequency is: f synclk = 2 * f sw for master mode to operate correctly, then resistor r osc must be less than 60 k as given below in ta b l e 8 . 6.4.2 slave mode (external clock) in order to accept an external clock input the pin rosc must be left open, that is, floating. this forces pin synclk to be internally configured as an input as given in ta bl e 8 . the output switching frequency of the slave devices is: f sw = f synclk / 2 figure 32. master and slave connection table 8. how to set up synclk mode rosc synclk master r osc < 60 k output slave floating (not connected) input synclk rosc tda7492 rosc cosc rosc synclk tda7492 39 k 100 nf output input master slave
applications information tda7492 26/32 doc id 14926 rev 5 6.5 output low-pass filter to avoid emi problems, it may be necessary to use a low-pass filter before the speaker. the cutoff frequency should be larger than 22 khz and much lower than the output switching frequency. it is necessary to choose the l-c component values depending on the loud speaker impedance. some typical values, which give a cutoff frequency of 27 khz, are shown in figure 33 and figure 34 below. figure 33. typical lc filter for a 8- speaker figure 34. typical lc filter for a 4- speaker
tda7492 applications information doc id 14926 rev 5 27/32 6.6 protection functions the tda7492 is fully protected against overvoltages, undervoltages, overcurrents and thermal overloads as explained here. overvoltage protection (ovp) if the supply voltage exceeds the value for v ovp given in table 5: electrical specifications on page 9 the overvoltage protection is activated which forces the outputs to the high-impedance state. when the supply voltage drops to below the threshold value the device restarts. undervoltage protection (uvp) if the supply voltage drops below the value for v uvp given in table 5: electrical specifications on page 9 the undervoltage protection is activated which forces the outputs to the high-impedance state. when the supply voltage recovers the device restarts. overcurrent protection (ocp) if the output current exceeds the value for i ocp given in table 5: electrical specifications on page 9 the overcurrent protection is activated which forces the outputs to the high-impedance state. periodically, the device attempts to restart. if the overcurrent condition is still present then the ocp remains active. the restart time, t oc , is determined by the r-c components connected to pin stby. thermal protection (otp) if the junction temperature, t j , reaches 145 c (nominally), the device goes to mute mode and the positive and negative pwm outputs are forced to 50% duty cycle. if the junction temperature reaches the value for t j given in table 5: electrical specifications on page 9 the device shuts down and the output is forced to the high-impedance state. when the device cools sufficiently the device restarts. 6.7 diagnostic output the output pin diag is an open drain transistor. when the protection is activated it is in the high-impedance state. the pin can be connected to a power supply (<26 v) by a pull-up resistor whose value is limited by the maximum sinking current (200 a) of the pin. figure 35. behavior of pin diag for various protection conditions tda7492 protection logic r1 diag vdd vdd overcurrent protection restart restart ov, uv, ot protection
applications information tda7492 28/32 doc id 14926 rev 5 6.8 heatsink requirements as with most amplifiers, the power dissipated within the device depends primarily on the supply voltage, the load impedance and the output modulation level. the maximum estimated power dissipation for the tda7492 is around 7 w. at 25 c ambient a heatsink having rth =15 c/w is sufficient for sine-wave testing at maximum power. a musical program, however, dissipates about 40% less power than this and a heatsink with rth = 25 c/w is thus recommended. even at the maximum recommended ambient temperature for consumer applications of 50 c there is still a clear safety margin before the maximum junction temperature (150 c) is reached.
tda7492 package mechanical data doc id 14926 rev 5 29/32 7 package mechanical data the tda7492 comes in a 36-pin powersso package with exposed pad up (epu). figure 36 shows the package outline and ta bl e 9 gives the dimensions. figure 36. powersso-36 epu outline drawing h x 45
package mechanical data tda7492 30/32 doc id 14926 rev 5 in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. table 9. powersso-36 epu dimensions symbol dimensions in mm dimensions in inches min typ max min typ max a 2.15 - 2.45 0.085 - 0.096 a2 2.15 - 2.35 0.085 - 0.093 a1 0 - 0.10 0 - 0.004 b 0.18 - 0.36 0.007 - 0.014 c 0.23 - 0.32 0.009 - 0.013 d 10.10 - 10.50 0.398 - 0.413 e 7.40 - 7.60 0.291 - 0.299 e - 0.5 - - 0.020 - e3 - 8.5 - - 0.335 - f - 2.3 - - 0.091 - g- - 0.10 - - 0.004 h 10.10 - 10.50 0.398 - 0.413 h- - 0.40 - - 0.016 k 0 - 8 degrees - - 8 degrees l 0.60 - 1.00 0.024 - 0.039 m - 4.30 - - 0.169 - n - - 10 degrees - - 10 degrees o - 1.20 - - 0.047 - q - 0.80 - - 0.031 - s - 2.90 - - 0.114 - t - 3.65 - - 0.144 - u - 1.00 - - 0.039 - x 4.10 - 4.70 0.161 - 0.185 y 4.90 - 7.10 0.193 - 0.280
tda7492 revision history doc id 14926 rev 5 31/32 8 revision history table 10. document revision history date revision changes 30-jul-2008 1 initial release. 4-nov-2008 2 updated v os details in ta bl e 5 updated chapter 4: characterization curves on page 11 . 15-apr-2009 3 updated supply operating range to 8 v - 26 v on page 1 changed c1 to c8 at beginning of section 3.3 on page 9 updated table 5: electrical specifications on page 9 for v cc min, iq condition, v os min/max, i oc , and added new parameter v uv updated figure 3: test circuit for characterizations on page 10 updated figure 28: applications circuit for class-d amplifier on page 22 inserted brackets in equation in ta bl e 5 , footnote and in section 6.4.1 on page 25 updated values in uvp and ocp in section 6.6 on page 27 updated package presentation in chapter 7 on page 29 and max vaules for a and a2 in table 9: powersso-36 epu dimensions on page 30 . 03-sep-2009 4 added text for exposed pad in figure 2 on page 7 added text for exposed pad in table 2 on page 8 removed figure 3: test circuit for characterizations since it is identical to apps circuit in figure 28 on page 22 moved section test board on page 21 to end of chapter updated package y (min) dimension in table 9 on page 30 12-sep-2011 5 updated outna in table 2: pin description list
tda7492 32/32 doc id 14926 rev 5 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by two authorized st representatives, st products are not recommended, authorized or warranted for use in milita ry, air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are not specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2011 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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